HDI PCB Prototype Services: Quick-Turn Guide
HDI Prototype Design and Technology
What Is an HDI PCB Prototype?
An HDI PCB prototype is a high-density interconnect printed circuit board manufactured in small quantities to verify fine-pitch routing, microvia reliability, controlled impedance, and assembly compatibility before production. Unlike a conventional PCB prototype, HDI construction uses laser-drilled microvias, blind or buried interconnections, fine conductor geometry, and often sequential lamination. HDI PCB prototype services help engineers validate complex BGA fanout, electrical performance, manufacturing tolerances, and reliability while the design can still be modified.
A quick turn HDI PCB uses the same essential fabrication principles but prioritizes engineering release, material availability, production scheduling, and inspection to shorten delivery.
Typical applications include advanced processors, medical electronics, compact wireless modules, AI hardware, and high-speed communication systems.
Characteristics of HDI PCB Prototypes
Microvias and Blind/Buried Vias
Microvias connect closely spaced copper layers through small laser-drilled openings.
Representative manufacturing dimensions include:
-
Laser microvia diameter: 75–100 μm.
-
Microvia dielectric thickness: 50–80 μm.
-
Finished mechanical hole: 0.15–0.20 mm.
-
Microvia capture pad: 200–250 μm, depending on registration and plating requirements.
-
Copper-filled microvias for selected via-in-pad structures.
A blind via connects an external layer to an internal layer. A buried via connects internal layers without reaching the finished board surfaces.
These structures free routing space beneath fine-pitch BGAs, but every additional drilling and plating operation introduces registration and reliability requirements.
Fine Trace Widths and Spaces
HDI routing commonly requires finer geometry than standard prototype fabrication.
| Design parameter | Conventional prototype | Advanced HDI example |
|---|---|---|
| Minimum line/space | 100/100 μm | 40/40 μm |
| Laser microvia | Not normally required | 75 μm |
| Mechanical drilled hole | 0.25 mm | 0.15 mm |
| BGA pitch | 0.65–1.00 mm | 0.35–0.50 mm |
| Layer construction | Conventional multilayer | Sequential build-up |
These values illustrate different capability classes, not guaranteed specifications for every manufacturer.
At 40/40 μm, etching compensation and copper thickness become critical. Excessive outer-layer copper can reduce achievable spacing because lateral etching increases with copper thickness.
Sequential Build-Up (SBU)
Sequential Build-Up creates additional interconnection layers through repeated lamination, laser drilling, and copper plating.
A typical process includes:
-
Fabricate and inspect the inner-layer core.
-
Laminate an additional dielectric and copper layer.
-
Laser-drill microvias.
-
Clean and metallize the holes.
-
Fill or plate the microvias as required.
-
Image the new circuitry.
-
Repeat for additional build-up stages.
Each cycle adds registration, thermal, and plating-control requirements.
Reduced Layer Count
HDI technology can sometimes reduce the number of layers needed for BGA fanout.
For example, a design requiring eight conventional routing layers may fit into six HDI layers when microvias provide more efficient escape routing.
However, fewer layers do not automatically mean lower cost. Laser drilling, sequential lamination, and copper filling may outweigh the savings from reduced layer count.
Common HDI Stack-Up Types
| Structure | Construction | Engineering consideration |
|---|---|---|
| 1+N+1 | One build-up layer on each side of the core | Lower HDI complexity |
| 2+N+2 | Two build-up layers on each side | Greater BGA routing density |
| 3+N+3 | Three build-up layers per side | More lamination and registration steps |
| 4+N+4 | Four build-up layers per side | High process complexity |
| ELIC | Every Layer Interconnect | Microvia interconnection across multiple adjacent layers |
In these structures, N represents the central core layer count, not the total finished layer count.
For example, a 2+4+2 construction contains eight copper layers.
ELIC, also called any-layer interconnect in some constructions, provides flexible routing between adjacent layers but requires strict control of microvia filling, alignment, and interconnection reliability.
Stack-Up and Material Selection
A practical eight-layer 2+4+2 prototype might use:
-
Finished thickness: 1.20 mm.
-
Core material: high-Tg FR4 or specified low-loss laminate.
-
Build-up dielectric: 60 μm.
-
Outer-layer finished copper: 25–35 μm.
-
Inner-layer copper: 18 μm.
-
Laser microvias: 100 μm.
-
Minimum line/space: 60/60 μm.
-
Differential impedance: 100 Ω ±10%.
The final trace geometry must be calculated using the actual dielectric thickness, material Dk, and copper profile.
High-speed designs should also specify insertion-loss requirements when impedance alone is insufficient.
Prototyping Best Practices and DFM
Plan the Stack-Up Early
HDI stackup selection should begin before BGA escape routing.
The fabricator needs the component pitch, signal-layer requirements, impedance targets, and proposed via structures.
Changing from 1+N+1 to 2+N+2 after routing may require extensive layout revision.
Check Microvia Aspect Ratios
Microvia aspect ratio is the drilled depth divided by the laser-drilled diameter.
For a 75 μm-deep dielectric and a 100 μm laser opening, the nominal ratio is 0.75:1.
A conservative design commonly targets ratios at or below approximately 1:1, subject to the qualified process.
Deeper microvias increase plating difficulty and may increase the risk of incomplete metallization.
Via-in-Pad (VIP)
Via-in-pad places a via directly within a component land, improving escape routing beneath fine-pitch packages.
For a filled and capped via-in-pad structure, the process may require:
-
Laser drilling and cleaning.
-
Copper metallization.
-
Copper filling.
-
Surface planarization.
-
Final copper capping.
-
Pad finish and inspection.
Unfilled or poorly planarized vias can draw solder away from the joint or produce inconsistent solder volume.
Partner with a Specialized Fabricator
A specialized HDI manufacturer should review:
-
Laser-drilling capability.
-
Copper-filled microvia process.
-
Sequential lamination capacity.
-
Layer-to-layer registration.
-
Fine-line etching capability.
-
Microsection and thermal-stress testing.
-
Controlled-impedance verification.
Hemeixin Electronics can be evaluated for HDI PCB prototype services, subject to confirmation of the proposed stackup, current manufacturing capabilities, and inspection requirements.
The most useful early deliverable is a fabricator-approved stackup and DFM report, not simply a quotation based on board dimensions.
Quick-Turn Manufacturing and Cost
Quick-Turn HDI Characteristics
A quick turn HDI PCB requires more than accelerated drilling and etching. Its delivery schedule depends on the number of lamination cycles, material availability, microvia filling, inspection requirements, and engineering approval.
Microvias and Laser Drilling
Laser drilling commonly uses CO₂ or UV laser systems, depending on the dielectric, copper configuration, and qualified process.
The manufacturing sequence must control:
-
Laser entry geometry and hole diameter.
-
Dielectric removal and bottom-pad exposure.
-
Residue removal and surface preparation.
-
Electroless copper coverage.
-
Electrolytic copper deposition or filling.
-
Cross-section verification.
A nominal 100 μm microvia with a 60 μm dielectric depth has a 0.60:1 aspect ratio.
A smaller diameter is not necessarily better if it reduces the plating process window.
Turnaround Times and Lead Times
The following ranges are illustrative planning windows for fabrication after complete engineering approval, not verified supplier commitments.
| HDI construction | Indicative fabrication window |
|---|---|
| 1+N+1 | 7–12 working days |
| 2+N+2 | 10–15 working days |
| 3+N+3 | 15–20 working days |
| 4+N+4 | 18–25 working days |
| Complex ELIC | 20–30+ working days |
Expedited production may shorten some schedules, but additional lamination cycles cannot always be compressed without affecting process control.
Material procurement, special testing, holidays, and assembly requirements can extend the total delivery date.
Quick Turn HDI PCB Cost
Key Cost Drivers
HDI prototype pricing is influenced by manufacturing complexity rather than board area alone.
Major cost factors include:
-
Blind and buried vias: Additional drilling, plating, and lamination operations.
-
Microvia filling: Copper filling and planarization increase process time.
-
Layer count and stackup: More layers require additional materials and registration control.
-
Lead-time pressure: Expedited scheduling can increase manufacturing charges.
-
Quantities: Small prototype lots distribute engineering and setup costs across fewer boards.
-
Material selection: Low-loss laminates and special dielectric systems can increase cost.
-
Inspection: Impedance coupons, microsections, and reliability testing add processing steps.
A ten-piece 2+N+2 order will not necessarily cost twice as much as a ten-piece 1+N+1 order. The actual difference depends on the complete fabrication route and yield assumptions.
Representative Factory Case
Eight-Layer HDI Controller Board
This is an illustrative manufacturing case based on representative engineering parameters, not an authenticated customer production record.
An eight-layer controller board uses a 0.40 mm-pitch BGA and requires 100 Ω differential routing.
| Parameter | Initial design |
|---|---|
| Layer count | 8 |
| HDI structure | 2+4+2 |
| Finished thickness | 1.20 mm |
| Minimum line/space | 60/60 μm |
| Laser microvia diameter | 100 μm |
| Build-up dielectric | 60 μm |
| Finished mechanical hole | 0.20 mm |
| Differential impedance | 100 Ω ±10% |
| Prototype quantity | 10 boards |
During DFM review, three problems are identified.
First, several microvias have insufficient capture-pad allowance for the proposed registration tolerance.
Second, a stacked microvia arrangement requires additional reliability evaluation.
Third, the outer-layer copper specification is inconsistent with the required fine-line geometry.
Engineering Improvements
The revised design:
-
Increases microvia capture-pad allowance where routing permits.
-
Uses staggered microvias in selected locations to reduce dependence on stacked structures.
-
Adjusts the outer-layer copper construction to match the approved etching process.
-
Updates impedance geometry using the finished stackup.
-
Adds microsection coupons for the critical microvia structures.
The revised design preserves the eight-layer 2+4+2 construction and the 100 Ω ±10% impedance target.
The three identified manufacturing conflicts are resolved at the documentation and design-review stage. Actual yield improvement, delivery time, and reliability must be established through prototype fabrication and testing.
HDI Fabrication and Assembly
A complete HDI prototype service should address both bare-board fabrication and printed circuit assembly.
The typical workflow includes:
-
Engineering review: Verify stackup, drill tables, impedance, and Gerber or ODB++ data.
-
Inner-layer fabrication: Image, etch, inspect, and prepare the core.
-
Sequential lamination: Add build-up dielectric and copper layers.
-
Laser drilling: Form microvias and prepare hole walls.
-
Copper plating: Metallize and fill microvias where specified.
-
Outer-layer processing: Complete imaging, etching, solder mask, and surface finish.
-
Bare-board testing: Perform continuity, isolation, dimensional, and impedance verification.
-
SMT assembly: Print solder paste, place components, and reflow.
-
Assembly inspection: Use AOI, X-ray inspection for hidden BGA joints, and electrical testing.
-
Functional verification: Program devices and validate power and signal interfaces.
For SAC305 lead-free solder, the peak reflow temperature is commonly around 235–250°C, subject to the solder paste, package limits, and approved thermal profile.
Manufacturing Quality Control
Important HDI inspection points include:
-
Laser microvia diameter and shape.
-
Copper plating continuity at the microvia bottom.
-
Copper-fill voids and surface planarity.
-
Inner-layer registration.
-
Finished line width and spacing.
-
Plated-hole wall quality.
-
Solder-mask registration.
-
Controlled-impedance coupons.
-
Thermal-stress and microsection evaluation.
-
BGA solder-joint inspection after assembly.
IPC-2221 provides general printed-board design requirements. IPC-2226 addresses HDI design. IPC-6012 establishes qualification and performance requirements for rigid printed boards, while IPC-6012-related HDI requirements and applicable procurement specifications must be identified by revision.
IPC-A-600 covers bare-board acceptability, IPC-A-610 covers electronic assembly acceptability, and J-STD-001 defines soldering requirements.
Common HDI Design Errors
Excessive Microvia Depth
A 100 μm microvia drilled through 120 μm of dielectric has a 1.20:1 aspect ratio.
This can reduce plating margin compared with a 0.60:1 construction. Reduce dielectric thickness or revise the interconnection design when required.
Unqualified Stacked Microvias
Stacked structures require appropriate copper filling and reliability qualification.
Staggered alternatives may improve the manufacturing process window when routing density allows.
Incorrect BGA Escape Rules
A 0.40 mm-pitch BGA may require via-in-pad or microvia fanout.
Using conventional through-hole escape patterns can block routing channels and increase the required layer count.
Late Stackup Changes
Changing dielectric thickness after impedance routing alters trace geometry.
Freeze the approved stackup before final artwork release.
Incomplete Quick-Turn Documentation
Missing drill definitions, unclear via filling, and unspecified impedance tolerances delay engineering release.
A complete package reduces avoidable clarification cycles before manufacturing starts.
Frequently Asked Questions
Q1. What is an HDI PCB prototype?
An HDI PCB prototype is a small-quantity board using fine traces, microvias, and advanced layer interconnections to validate dense electronic designs. It is commonly used for fine-pitch BGAs, high-speed interfaces, and compact products before volume production.
Q2. How quickly can a quick turn HDI PCB be manufactured?
Lead time depends on the number of sequential lamination cycles, microvia filling, material availability, and inspection requirements. A simple 1+N+1 construction may be planned around 7–12 working days, while complex 3+N+3 or ELIC designs can require substantially longer. These are illustrative planning ranges, not guaranteed delivery dates.
Q3. What makes an HDI PCB prototype expensive?
The main cost drivers are laser drilling, sequential lamination, copper-filled microvias, fine-line processing, material selection, inspection, and low order quantity. Expedited scheduling can increase cost further. A design with fewer copper layers may still cost more if it requires additional build-up cycles.
Q4. What files are required for HDI PCB prototype services?
A complete package normally includes Gerber or ODB++ data, NC drill files, a layer stackup, controlled-impedance requirements, microvia and buried-via definitions, material specifications, fabrication notes, and acceptance criteria. For assembly, include the BOM, component placement files, assembly drawings, and test requirements.
Conclusion
HDI PCB prototype services allow engineers to verify high-density routing, microvia reliability, and assembly performance before production.
Successful prototypes depend on early stackup planning, realistic microvia aspect ratios, controlled fine-line fabrication, and complete manufacturing documentation.
Quick-turn delivery is most predictable when the design uses a qualified construction, available materials, and clearly defined inspection requirements.
For advanced 2+N+2, 3+N+3, 4+N+4, and ELIC structures, manufacturability and reliability should take priority over nominal lead-time claims.



