PCB Vias: Blind, Buried, and Microvias

PCB vias are plated electrical connections that carry signals, power, or ground between copper layers. A through via passes through the entire board, a blind via connects an outer layer to one or more internal layers, a buried via connects only internal layers, and microvias are small laser-drilled structures commonly used in HDI PCB designs. Selecting the correct via structure affects component density, layer count, signal integrity, fabrication cost, and long-term reliability. Production-ready designs must define finished hole size, pad diameter, dielectric depth, aspect ratio, copper plating, filling method, and sequential lamination sequence before routing begins.

IPC-2221C establishes generic printed board design requirements, while IPC-2226 covers high density interconnect design practices. IPC-6012F defines qualification and performance requirements for rigid printed boards, including constructions with blind vias, buried vias, and microvias. IPC-A-600 provides visual acceptance criteria used during inspection.

What Are Vias?

A via consists of a drilled opening, copper-plated barrel, annular ring, and connection pads on selected layers. Its purpose is to move an electrical net vertically through the PCB stack-up.

A complete via specification includes:

• Drill diameter
• Finished hole diameter
• Pad diameter
• Antipad diameter
• Connected layer range
• Copper plating thickness
• Filling or plugging requirement
• Surface finish
• Aspect ratio
• Electrical net classification

Typical rigid PCB values include:

A smaller via consumes less routing area, but reduced dimensions tighten drilling, registration, plating, and inspection tolerances. A 0.20 mm mechanical drill may be routine in a 1.0 mm board, yet unreliable in a 3.2 mm board because the drill aspect ratio rises from 5:1 to 16:1.

Via Type Comparison

Through vias remain the most economical option for low-density boards. Blind vias, buried vias, and microvias become valuable when BGA pitch, board area, layer escape, or high-speed performance prevents the use of conventional holes.

Blind Via Features

Structure

A blind via starts on an external copper layer and terminates on an internal layer without passing through the complete PCB thickness.

Common structures include:

• L1–L2 laser blind via
• L1–L3 mechanically drilled blind via
• L1–L2 and L2–L3 stacked microvias
• L1–L2 and L3–L4 staggered microvias
• Bottom-side equivalents from the final layer inward

A typical L1–L2 blind via uses:

• Laser diameter: 0.075–0.10 mm
• Capture pad: 0.20–0.25 mm
• Build-up dielectric: 0.06–0.09 mm
• Finished outer copper: 30–40 μm
• Copper-filled via for Via in Pad
• Maximum depth-to-diameter ratio: approximately 1:1

The blind via hole must fully expose the target copper while avoiding excessive laser penetration. In production, inadequate energy leaves resin on the target pad, while excessive energy erodes the target copper and weakens the interconnect.

Visibility

A blind via is visible from one exterior surface but not from the opposite side. This provides an immediate structural distinction from a through via.

Visibility also affects inspection:

• The external opening can be checked by automated optical systems.
• Internal target contact requires microsection verification.
• Copper filling can be evaluated by X-ray and cross-section.
• Hidden interface separation may require thermal cycling or interconnect stress testing.

A designer cannot judge blind via reliability from the surface appearance alone. A clean opening may still contain bottom-interface contamination, thin knee plating, or a hidden fill void.

Aspect Ratio

Blind via aspect ratio is calculated as drilled depth divided by drill diameter.

Example:

• Dielectric depth: 0.08 mm
• Laser diameter: 0.10 mm
• Aspect ratio: 0.8:1

For laser microvias, keeping the aspect ratio at or below 1:1 supports better laser cleaning and more uniform copper deposition. A 0.075 mm opening through a 0.10 mm dielectric creates a 1.33:1 ratio, which increases the risk of weak bottom plating and trapped chemistry.

Mechanically drilled blind vias may use greater ratios, but deeper holes require larger drill sizes and tighter plating control. The factory must review the actual pressed dielectric thickness rather than the nominal prepreg thickness shown in a material datasheet.

Blind Via Benefits

Space Saving

A blind via does not occupy pads and antipads on every layer. Internal routing channels remain available beneath the via termination layer.

A typical 0.50 mm pitch BGA fanout illustrates the value:

• Through-via pad: approximately 0.45–0.55 mm
• Laser blind-via pad: approximately 0.20–0.25 mm
• Typical HDI trace/space: 0.075/0.075 mm
• Advanced production trace/space: 0.060/0.060 mm

Replacing a through via with a blind via can free one or two routing channels between pad columns, allowing an 8-layer HDI PCB to perform routing that might otherwise require a 10-layer conventional PCB.

Better Signals

Blind vias reduce unused conductive barrel length. A shorter vertical transition lowers parasitic inductance and capacitance and removes much of the via stub found in through-hole structures.

The benefit becomes more important for:

• PCI Express
• USB 3.x
• Ethernet
• DDR memory
• SerDes links
• RF transitions

A through via on a 2.0 mm board may leave a stub longer than 1.0 mm when the signal only travels from L1 to L3. A blind via connecting the same layers removes that long unused section. The result is a cleaner impedance transition and lower resonance risk.

Blind vias do not automatically solve signal integrity problems. Pad size, antipad geometry, reference-plane changes, return vias, and layer-transition count must still be modeled.

Buried Via Features

A buried via connects two or more internal copper layers and is completely enclosed inside the laminated board.

Typical examples include:

• L2–L3
• L3–L6
• L4–L5
• Internal core connections in rigid-flex PCB constructions

Buried vias preserve both external surfaces for component pads and routing. They are useful beneath dense BGAs, connectors, and shielded areas where surface real estate is limited.

Typical mechanically drilled buried-via values include:

• Drill diameter: 0.15–0.25 mm
• Finished hole: 0.10–0.20 mm
• Pad diameter: 0.35–0.50 mm
• Subcomposite thickness: 0.6–1.2 mm
• Preferred subcomposite aspect ratio: below 8:1
• Registration allowance: 0.075–0.10 mm beyond finished hole radius

A buried-via subassembly must be drilled, plated, imaged, inspected, and tested before it is laminated into the final PCB. Once enclosed, repair is impossible.

Buried Via Manufacturing Process

Inner Layer Drilling

Buried vias are created while the relevant layers remain accessible as an internal core or subcomposite.

The process normally follows this sequence:

1. Image and etch the internal copper layers.
2. Align the subcomposite.
3. Mechanically drill the buried via holes.
4. Remove resin smear from the hole walls.
5. Deposit electroless copper.
6. Electroplate the via barrels.
7. Inspect copper thickness and registration.
8. Electrically test the subassembly.
9. Laminate it with the remaining layers.

Key production controls include:

• Drill wander below 50 μm
• Hole-wall roughness controlled by drill parameters
• Complete desmear without excessive glass-fiber attack
• Copper thickness verified by microsection
• No inner-layer separation
• Electrical continuity before final lamination

A buried via failure detected after final lamination may scrap the entire multilayer panel. Testing the subassembly before enclosure removes defective cores early.

Sequential Lamination

Sequential lamination means that selected PCB layers are fabricated and laminated in multiple build cycles rather than one press cycle.

An example 2+6+2 HDI PCB may require:

1. Fabricate the six-layer core.
2. Drill and plate buried vias in the core.
3. Laminate the first build-up dielectric and copper.
4. Laser drill L2–L3 and L8–L9 microvias.
5. Plate, fill, image, and etch.
6. Laminate the second build-up layers.
7. Laser drill L1–L2 and L9–L10 microvias.
8. Plate, fill, and complete the outer layers.

Typical lamination conditions depend on material, but high-Tg FR-4 commonly uses peak press temperatures around 185–205°C. Each heat cycle changes resin flow, copper distribution, and dimensional movement.

Factory artwork compensation is therefore calculated independently for each build cycle. Using one scale factor across all stages can produce 30–60 μm accumulated registration error on advanced structures.

How Microvias Work and Are Built

Microvias are small blind or buried interconnections used primarily between adjacent layers in an HDI PCB. They are normally formed with ultraviolet or carbon-dioxide laser energy rather than mechanical drills.

A typical laser microvia process includes:

1. Laminate a thin dielectric over the target copper.
2. Use laser energy to remove dielectric material.
3. Clean residual resin and laser debris.
4. Deposit electroless copper.
5. Electroplate the sidewall and target interface.
6. Fill the microvia with copper when required.
7. Planarize the surface for stacked vias or Via in Pad.
8. Image and etch the new copper layer.
9. Inspect by X-ray, AOI, and microsection.

Typical targets include:

• Microvia diameter: 0.075–0.10 mm
• Dielectric depth: 0.06–0.09 mm
• Capture pad: 0.20–0.25 mm
• Laser registration: ±0.025 mm
• Surface dimple after filling: below 15–20 μm
• Fill void area: no rejectable void under the applicable specification
• Copper at the via bottom and knee: verified by cross-section

Carbon-dioxide lasers remove resin efficiently but interact differently with copper and glass reinforcement. Ultraviolet lasers provide a smaller focused spot and can process finer structures. Many production lines combine laser types or use copper-window preparation to control the opening.

Stacked vs. Staggered Configurations

Stacked Microvias

Stacked microvias form a vertical copper column through two or more build-up layers.

A three-level stack may connect:

• L1–L2
• L2–L3
• L3–L4

The lower microvia must be completely copper-filled and planarized before the next microvia is drilled above it.

Stacked structures provide:

• Direct vertical connection
• Minimum routing footprint
• Short transition length
• High BGA escape density

Production risks include:

• Interface separation
• Copper-fill voids
• Misregistration between levels
• Excessive dimple
• Thermal fatigue at the target interface

A factory may permit two stacked levels in routine production but require additional qualification for three or four levels. The acceptance decision should depend on material, via diameter, dielectric thickness, thermal class, and test history rather than layer count alone.

Staggered Microvias

Staggered microvias are offset from one build-up layer to the next and joined by a short copper trace.

A typical arrangement uses:

• L1–L2 via
• 0.15–0.30 mm horizontal offset
• L2–L3 via
• Short L2 connecting trace

The offset spreads thermomechanical stress and avoids placing several interface boundaries in one vertical column.

Staggered microvias provide:

• Better manufacturing tolerance
• Lower alignment sensitivity
• Reduced interface stress
• Easier defect isolation

They consume more routing area than stacked microvias. In regions where the BGA pitch is 0.40 mm or below, the required offset may not fit, making stacked microvias necessary.

Advantages of Using Microvias

Unmatched Component Density

Microvias support compact fanout beneath fine-pitch packages.

Common applications include:

• 0.35 mm and 0.40 mm pitch BGAs
• Mobile processors
• Memory packages
• Camera modules
• Wearable electronics
• Medical sensors

A 0.075 mm microvia placed inside a 0.20 mm pad consumes far less space than a 0.20 mm mechanical drill with a 0.45 mm pad. This geometry allows routing directly from component pads instead of creating long dog-bone fanouts.

Improved Signal Integrity

The short depth of a microvia reduces parasitic effects and eliminates a long unused barrel. Microvias also allow high-speed signals to reach an adjacent reference plane with minimal vertical travel.

Signal benefits include:

• Shorter transition path
• Lower via inductance
• Reduced stub resonance
• Smaller antipad requirement
• Easier return-path placement

For controlled impedance routing, the factory still needs:

• Finished copper thickness
• Pressed dielectric thickness
• Material Dk
• Trace geometry
• Reference-plane definition
• Target impedance and tolerance

Typical controlled impedance requirements are:

• Single-ended: 50 Ω
• USB differential: 90 Ω
• PCIe differential: 85 Ω
• Ethernet differential: 100 Ω
• Production tolerance: ±7% or tighter when agreed

Smaller Footprints

Microvias reduce board area and can lower layer count when used selectively.

A practical density conversion may change:

• Conventional design: 12 layers with through vias
• HDI PCB design: 10 layers with 1+8+1 construction
• Board area reduction: approximately 10–20%
• Routing escape improvement: one additional channel per BGA region

The exact result depends on package pitch, trace/space, stack-up, and component placement. Replacing every via with a microvia usually adds cost without equivalent value. The strongest result comes from using microvias only where through-hole geometry blocks routing.

Rigid-Flex and Flexible PCB Use

Blind vias and microvias can be used in rigid flex PCB and flexible PCB structures, but the stack-up requires stricter mechanical control.

Typical limitations include:

• Microvias placed in rigid sections rather than dynamic bend zones
• Coverlay openings kept away from bend transitions
• Copper balanced across rigid sections
• Acrylic adhesive flow controlled around drilled features
• Stacked microvias avoided near rigid-to-flex interfaces
• Bend radius based on copper layers and flex thickness

A flexible PCB with one copper layer may use a dynamic bend radius of approximately 6–10 times the flex thickness. Multilayer rigid-flex constructions require larger radii because internal copper layers experience higher strain.

Vias should remain at least 1.0–2.0 mm from the rigid-to-flex transition unless the qualified stack-up and product geometry support a smaller distance.

Quality Control Requirements

Via quality cannot be confirmed through final electrical testing alone. A thin copper interface may pass continuity testing at room temperature and fail after lead-free reflow or thermal cycling.

Production microsections should be taken from representative coupon positions, including panel center and edge. Edge panels can receive different plating current density and laser focus conditions from center panels.

Critical section measurements include:

• Microvia bottom contact
• Knee copper thickness
• Target-pad erosion
• Fill profile
• Dimple depth
• Barrel copper
• Annular ring
• Layer registration
• Dielectric thickness

For high-reliability HDI PCB products, thermal cycling, interconnect stress testing, and multiple lead-free reflow simulations provide stronger evidence than visual inspection alone.

Factory Case Study

14-Layer Communications Board

The project used the following construction:

• Layer count: 14
• Stack-up: 2+10+2
• Board thickness: 1.8 mm
• Material: high-Tg FR-4, Tg 170°C
• BGA pitch: 0.40 mm
• Trace/space: 0.075/0.075 mm
• Microvia: 0.075 mm
• Capture pad: 0.20 mm
• Build-up dielectric: 0.08 mm
• Blind vias: L1–L2 and L14–L13
• Second-level microvias: L2–L3 and L13–L12
• Buried vias: L4–L11
• Controlled impedance: 50 Ω and 100 Ω
• Impedance tolerance: ±7%
• Surface finish: ENIG

Initial Production Problems

The first engineering lot showed:

• Second-level microvia interface failures: 4.8%
• Laser target erosion at panel edges: 3.1%
• Impedance deviation: +9.6%
• Lamination registration shift: 42 μm
• First-pass panel yield: 88.7%

The causes were traced to:

• Two directly stacked microvia levels with incomplete lower-via planarization
• Laser energy calibrated only at the panel center
• Impedance calculation based on nominal rather than pressed dielectric thickness
• One artwork compensation factor used for both build cycles
• Copper density imbalance around the BGA region

Process Improvements

The engineering changes included:

• Converting noncritical stacked microvias to 0.20 mm-offset staggered structures
• Reducing lower-via dimple from 24 μm to below 12 μm
• Calibrating laser energy at center and four panel-edge locations
• Measuring pressed dielectric thickness from lamination coupons
• Applying separate X-Y compensation for each build-up cycle
• Adding copper balancing outside the functional routing area
• Increasing microsection sampling from two to six coupons per lot

Measured Results

The main yield improvement came from separating dense BGA transitions from noncritical routing. Stacked microvias remained only beneath the 0.40 mm BGA, while staggered microvias were used elsewhere. This preserved component density and reduced the number of thermally sensitive vertical stacks.

Common Design Errors

Excessive Microvia Depth

A 0.075 mm microvia through a 0.10 mm dielectric creates a 1.33:1 aspect ratio. The small opening restricts plating solution exchange and reduces bottom copper uniformity.

A more stable combination is:

• Via diameter: 0.10 mm
• Dielectric depth: 0.075 mm
• Aspect ratio: 0.75:1

Missing Sequential Build Data

Gerber files may show the final copper geometry but not the required manufacturing order. The fabrication drawing must define:

• Blind via layer span
• Buried via layer span
• Stacked or staggered relationship
• Copper-fill requirement
• Lamination sequence
• Final surface condition

Without this information, the factory may interpret two overlapping blind vias as a single mechanically drilled structure.

Inadequate Capture Pads

A 0.075 mm laser hole on a 0.15 mm pad leaves only 37.5 μm nominal capture per side before registration and etching tolerances. A 25 μm laser-position shift can reduce the remaining copper to approximately 12.5 μm.

Using a 0.20 mm capture pad provides 62.5 μm nominal capture per side and a stronger production margin.

Stacked Vias Used Everywhere

Stacked microvias increase density but add copper filling, planarization, alignment, inspection, and reliability risk. Staggered microvias should replace them where routing area permits.

Via Placement Near Flex Bends

A blind via hole positioned at a rigid-flex transition experiences strain concentration during bending. Moving the via 1.5 mm into the rigid region reduces stress on the plated interface.

Impedance Modeled Without Via Geometry

A 50 Ω trace can still experience a local discontinuity when the via pad, antipad, and reference transition are ignored. High-speed designs must include:

• Via barrel length
• Pad diameter
• Antipad diameter
• Reference plane
• Return via location
• Unused pad removal

FAQ

What Is a Blind Via in PCB Design?

Question: What is a blind via PCB structure, and when should it be used?

Answer: A blind via connects an outer copper layer to one or more internal layers without extending through the complete board. It is used when through vias consume too much routing area, create excessive signal stubs, or block BGA escape channels. Typical laser blind vias measure 0.075–0.10 mm in diameter with a depth-to-diameter ratio no greater than approximately 1:1.

What Is the Difference Between Blind and Buried Vias?

Question: How do blind vias differ from buried vias?

Answer: Blind vias are visible from one external PCB surface and terminate internally. Buried vias connect only internal layers and cannot be seen after final lamination. Blind vias support outer-layer component fanout, while buried vias preserve routing space on both external surfaces. Buried-via fabrication requires drilling, plating, inspection, and electrical testing before the internal subassembly is enclosed.

Are Stacked or Staggered Microvias More Reliable?

Question: Which microvia configuration provides better manufacturing reliability?

Answer: Staggered microvias generally provide a wider process margin because the offset structure distributes thermomechanical stress and reduces direct interface stacking. Stacked microvias provide greater routing density but require complete copper filling, low surface dimple, accurate alignment, and stronger thermal qualification. The final selection depends on BGA pitch, available routing space, layer count, and product reliability class.

Can Microvias Be Used in Rigid-Flex PCB Designs?

Question: Can microvias be included in a rigid-flex PCB or flexible PCB?

Answer: Yes. Microvias are frequently used in the rigid sections of rigid-flex PCB constructions. They should normally remain outside dynamic bend zones and away from the rigid-to-flex transition. A clearance of approximately 1.0–2.0 mm from the transition is commonly applied unless the specific stack-up has been qualified for a smaller distance.